The continued growth and expansion of microminiaturized circuit architectures has involved an increase in complexity and packaging density of both the functional circuit elements contained within a semiconductor substrate and interconnection arrangements (metal/insulation structures) that overlie the surface of the substrate and which serve to interconnect components in the substrate to each other and to external electrical coupling terminals. Typically, the interconnection layers comprise multiple layers of signal coupling tracks that pass over and/or are interconnected to each other and/or to components in the underlying substrate, effectively creating a three-dimensional tiered or layered arrangements of conductors separated by insulator layers.
Because of the complexity of the integrated circuit layout in the semiconductor material of the chip and the resulting often tortuous interconnection pattern required, the potential for discontinuities in the interconnection pattern is a significant problem that must be minimized for achieving sought after yield and performance. In essence, what is desired is that each level of interconnect be effectively planar, namely without "steps", whereat corners and field gradients in a conductor layer give rise to contact/conductor separation (open circuits), punch through, etc.
One approach for achieving a planarized interconnect structure involves the use of a planarization overlay that is deposited over an uneven metal/insulator structure. The overlay is made of a material which, for a prescribed etchant, is etched at approximately the same rate as the highest (thickest) of the layers to be planarized. In its deposited configuration, the planarization overlay has a substantially flat upper surface. As a result, as the etchant attacks the overlay and the higher (thicker) material, the surface of the overall structure follows the flattened surface contour of the overlay, to thereby obtain a "planarized" structure. A drawback to this procedure is the fact that the overlay layer adds additional material to the structure, which is not functionally necessary for its operation, and requires additional processing steps.